1. Field of the Invention
The present invention relates to a current sampling mixer capable of being applied to a broadband broadcasting system, and more particularly, to a current sampling mixer with harmonic rejection mixer (HMR) function which can change a structure of a current sampler including a plurality of capacitors to select and sum capacitors having a weight value given in the output, thereby performing a finite impulse response filter function and a harmonic rejection function.
2. Description of the Related Art
In general, in a broadband broadcasting system, there may exist other channels or interruption signals in a region corresponding to the harmonic of a desired signal.
Meanwhile, a current sampler uses a scheme which sequentially stores continual samples in a plurality of capacitors while converting a radio frequency (RF) signal into a desired intermediate frequency (IF) signal, and implements a finite impulse response filter and characteristics through a process that simultaneously outputs the samples stored in the capacitors.
Such a current sampler has harmonic conversion characteristics as illustrated in FIG. 1.
FIG. 1A is a description diagram of an ideal signal conversion. FIG. 1B is a description diagram of a real signal conversion.
Referring to FIG. 1A, in a current sampling process of the current sampler, if a desired signal and an interference signal are converted by an oscillation signal LO when there is no harmonic of the oscillation signal LO ideally, the converted signal do not include an interruption signal.
Referring to FIG. 1B, in a current sampling process of the current sampler, since there exists a harmonic of the oscillation signal LO substantially, the converted interference signal is included in the converted desired signal when the interference signal of a desired RF signal takes a conversion process by the harmonic of the oscillation signal LO. Accordingly, the interference signal of a desired RF signal operates as an interruption signal against a desired signal.
FIG. 2A is a concept diagram of the related art switching mixer. FIG. 2B is a concept diagram of the related art harmonic rejection mixer. FIG. 2C is a concept diagram of a generation of a multi-phase oscillation signal LO.
Referring to FIG. 2A, in a case where an oscillation signal LO of a square wave is used in a signal conversion, if the fast Fourier transform (FFT) of the oscillation signal LO of the square wave is performed and a frequency component is checked, it can be seen that the FFT performed oscillation signal (FLO) includes a plurality of frequency components. Accordingly, if a RF signal is converted using the square wave oscillation signal LO, an IF signal and a plurality of IF harmonics are generated.
To reject the harmonic of the oscillation signal, the related art harmonic rejection mixer may be configured as illustrated in FIG. 3.
FIG. 3 is a block diagram of the related art harmonic rejection mixer.
Referring to FIG. 3, the related art harmonic rejection mixer includes an output load unit 10 connected to a power supply terminal Vcc, and first to third mixing circuit units 21 to 23 which are connected to the output load unit 10 in parallel and have a Gilbert Cell structure.
The first mixing circuit unit 21 includes gain stages M15 and M16 for receiving an input signal RFin, and switch stages M11 to M14 for switching the input signal RFin from the gain stages M15 and M16 according to a first oscillation signal LO1, mixing the input signal RFin with the first oscillation signal LO1 and outputting them through the output load unit 10.
The second mixing circuit unit 22 includes gain stages M25 and M26 for receiving an input signal RFin, and switch stages M21 to M24 for switching the input signal RFin from the gain stages M25 and M26 according to a second oscillation signal LO2, mixing the input signal RFin with the second oscillation signal LO2 and outputting them through the output load unit 10.
The third mixing circuit unit 23 includes gain stages M35 and M36 for receiving an input signal RFin, and switch stages M31 to M34 for switching the input signal RFin from the gain stages M35 and M36 according to a third oscillation signal LO3, mixing the input signal RFin with the third oscillation signal LO3 and outputting them through the output load unit 10.
As illustrated in FIG. 2C, since the first oscillation signal LO1, the second oscillation signal LO2 and the third oscillation signal LO3 have different phases, an oscillation signal which is the sum of the first to third oscillation signals LO1 to LO3 has a multi-phase.
Each of the gain stages of the first to third mixing circuit units 21 to 23 provides a weight to a corresponding switch stage to exert an influence on the oscillation signal of the multi-phase.
The related art multi-phase harmonic rejection mixer of FIGS. 2 and 3 uses a scheme which rejects a harmonic component and a scheme which shares the output load unit 10 via the use of a multi-phase of a rectangular wave oscillation signal LO. Herein, since the multi-phase takes charge of a portion associated with a phase and the gain stages of each of the mixing circuit units take charge of a portion corresponding to a weight value, the sum of signals produces an effect such as the multiplication of sine wave oscillation signals LO.
In this way, the related art harmonic rejection mixer of FIGS. 2 and 3 may be applied to a continuous analog type system to reject a harmonic, but cannot be applied to a discrete analog system.